The student will have the opportunity to work with experts in the prognostics and condition monitoring field, as well as being part of our strong and dynamic research centre at Cranfield. Read more Read less

Despite improvements in design for testability techniques such as JTAG that widely has been accepted by industries, current VLSI technologies have still failed to implement a complete on-chip health monitoring mechanism. A reason is JTAG has been specifically developed for fault detection rather than fault prediction, prognostic, diagnostic, and reasoning. Hence, there might be benefits to enhance the design for testability techniques with health management capabilities, and further employ it in heterogeneous distributed systems (HDS) where a number of VLSI devices, electronic boards, and systems are employed in industrial applications, such as aerospace. This actually enhances both JTAG and HDS with Built-In-Health-Test, scalability, reliability, etc. This project ultimately aims to develop a design for prognostic technique versus design for testability technique.

The student will have the opportunity to work with experts in the prognostics and condition monitoring field, as well as being part of our strong and dynamic research centre at Cranfield.

The Integrated Vehicle Health Management (IVHM) Centre is a major collaborative venture at Cranfield, started in 2008, with funding from the East of England Development Agency (EEDA); a consortium of core industrial partners, (Boeing, BAE Systems, Rolls-Royce, Meggitt, Thales, MOD and Alstom); and from EPSRC. The investment, over the first 5 years of operation, was approaching £10M. We are now in our eighth year of operation and the Centre has grown into other sectors (rail, energy, health and agriculture), and is financially self-sustaining; many of the partners (and others) are funding Applied Research projects and there is a growing revenue from EPSRC, TSB and EU funded work.

At a glance

  • Application deadline21 Dec 2018
  • Award type(s)PhD
  • Duration of award3 years
  • EligibilityUK, EU, Rest of World
  • Reference numberSATM0033

Entry requirements

  • A minimum of a 2:1 first degree in a relevant discipline/subject area (e.g. electronics)
  • A minimum 60% mark in the Project element or equivalent with a minimum 60% overall module average
  • A minimum of English language proficiency (IELTS overall minimum score of 6.5)
  • Good understanding of analog and digital circuit design

The candidate is also expected to:

  • Have excellent analytical, reporting and communication skills
  • Be self-motivated, independent and team player
  • Be genuine enthusiasm for the subject and technology
  • Have the willing to publish research findings in international journals

Funding

Self-funded

Cranfield Doctoral Network

Research students at Cranfield benefit from being part of a dynamic, focused and professional study environment and all become valued members of the Cranfield Doctoral Network. This Network brings together both research students and staff, providing a platform for our researchers to share ideas, identify opportunities for collaboration and create smaller communities of practice.  It aims to encourage an effective and vibrant research culture, founded upon the diversity of activities and knowledge. A tailored programme of seminars and events alongside our Doctoral Researchers Core Development programme (transferable skills training), provide those studying a research degree with a wealth of social and networking opportunities.


How to apply

If you have any questions regarding the details of the project, contact Dr Mohammad Samie (m.samie@cranfield.ac.uk).

If you are eligible to apply for this research studentship, please complete the online application form.

For further information contact us today:
T: 44 (0)1234 758008
E: enquiries@cranfield.ac.uk